\doxysubsubsubsubsection{Fast-\/mode Plus on GPIO }
\hypertarget{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o}{}\label{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o}\index{Fast-\/mode Plus on GPIO@{Fast-\/mode Plus on GPIO}}
\doxysubsubsubsubsubsubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga1f9beaf68b00ae5598cb8d930da05704}{SYSCFG\+\_\+\+FASTMODEPLUS\+\_\+\+PB6}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga4f1109e7172c280e92a0a36a04f955a6}{SYSCFG\+\_\+\+PMCR\+\_\+\+I2\+C\+\_\+\+PB6\+\_\+\+FMP}}
\begin{DoxyCompactList}\small\item\em Fast-\/mode Plus driving capability on a specific GPIO. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga4b939ef5ec69e81277ef2323d5917eb5}{SYSCFG\+\_\+\+FASTMODEPLUS\+\_\+\+PB7}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga857e64c3b9046d7f4e31dcff948ee1fb}{SYSCFG\+\_\+\+PMCR\+\_\+\+I2\+C\+\_\+\+PB7\+\_\+\+FMP}}
\item 
\#define \mbox{\hyperlink{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga2cd8442a02f25ed8e7e0ba6e5723edd4}{SYSCFG\+\_\+\+FASTMODEPLUS\+\_\+\+PB8}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga20cec3b2133abb30466383a87a73a07d}{SYSCFG\+\_\+\+PMCR\+\_\+\+I2\+C\+\_\+\+PB8\+\_\+\+FMP}}
\item 
\#define \mbox{\hyperlink{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga71c50ae2406cd9b6dff73cd9cd189c3d}{SYSCFG\+\_\+\+FASTMODEPLUS\+\_\+\+PB9}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga32e0273693846a65638ea444795d6860}{SYSCFG\+\_\+\+PMCR\+\_\+\+I2\+C\+\_\+\+PB9\+\_\+\+FMP}}
\item 
\#define \mbox{\hyperlink{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga2d44c67961ec9f4feecec777364c13a0}{IS\+\_\+\+SYSCFG\+\_\+\+FASTMODEPLUS}}(\+\_\+\+\_\+\+PIN\+\_\+\+\_\+)
\end{DoxyCompactItemize}


\doxysubsubsubsubsubsection{Detailed Description}


\label{doc-define-members}
\Hypertarget{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_doc-define-members}
\doxysubsubsubsubsubsection{Macro Definition Documentation}
\Hypertarget{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga2d44c67961ec9f4feecec777364c13a0}\index{Fast-\/mode Plus on GPIO@{Fast-\/mode Plus on GPIO}!IS\_SYSCFG\_FASTMODEPLUS@{IS\_SYSCFG\_FASTMODEPLUS}}
\index{IS\_SYSCFG\_FASTMODEPLUS@{IS\_SYSCFG\_FASTMODEPLUS}!Fast-\/mode Plus on GPIO@{Fast-\/mode Plus on GPIO}}
\doxysubsubsubsubsubsubsection{\texorpdfstring{IS\_SYSCFG\_FASTMODEPLUS}{IS\_SYSCFG\_FASTMODEPLUS}}
{\footnotesize\ttfamily \label{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga2d44c67961ec9f4feecec777364c13a0} 
\#define IS\+\_\+\+SYSCFG\+\_\+\+FASTMODEPLUS(\begin{DoxyParamCaption}\item[{}]{\+\_\+\+\_\+\+PIN\+\_\+\+\_\+}{}\end{DoxyParamCaption})}

{\bfseries Value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ((((\_\_PIN\_\_)\ \&\ \mbox{\hyperlink{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga1f9beaf68b00ae5598cb8d930da05704}{SYSCFG\_FASTMODEPLUS\_PB6}})\ ==\ \mbox{\hyperlink{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga1f9beaf68b00ae5598cb8d930da05704}{SYSCFG\_FASTMODEPLUS\_PB6}})\ ||\ \(\backslash\)}
\DoxyCodeLine{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (((\_\_PIN\_\_)\ \&\ \mbox{\hyperlink{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga4b939ef5ec69e81277ef2323d5917eb5}{SYSCFG\_FASTMODEPLUS\_PB7}})\ ==\ \mbox{\hyperlink{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga4b939ef5ec69e81277ef2323d5917eb5}{SYSCFG\_FASTMODEPLUS\_PB7}})\ ||\ \(\backslash\)}
\DoxyCodeLine{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (((\_\_PIN\_\_)\ \&\ \mbox{\hyperlink{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga2cd8442a02f25ed8e7e0ba6e5723edd4}{SYSCFG\_FASTMODEPLUS\_PB8}})\ ==\ \mbox{\hyperlink{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga2cd8442a02f25ed8e7e0ba6e5723edd4}{SYSCFG\_FASTMODEPLUS\_PB8}})\ ||\ \(\backslash\)}
\DoxyCodeLine{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (((\_\_PIN\_\_)\ \&\ \mbox{\hyperlink{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga71c50ae2406cd9b6dff73cd9cd189c3d}{SYSCFG\_FASTMODEPLUS\_PB9}})\ ==\ \mbox{\hyperlink{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga71c50ae2406cd9b6dff73cd9cd189c3d}{SYSCFG\_FASTMODEPLUS\_PB9}}))}

\end{DoxyCode}
\Hypertarget{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga1f9beaf68b00ae5598cb8d930da05704}\index{Fast-\/mode Plus on GPIO@{Fast-\/mode Plus on GPIO}!SYSCFG\_FASTMODEPLUS\_PB6@{SYSCFG\_FASTMODEPLUS\_PB6}}
\index{SYSCFG\_FASTMODEPLUS\_PB6@{SYSCFG\_FASTMODEPLUS\_PB6}!Fast-\/mode Plus on GPIO@{Fast-\/mode Plus on GPIO}}
\doxysubsubsubsubsubsubsection{\texorpdfstring{SYSCFG\_FASTMODEPLUS\_PB6}{SYSCFG\_FASTMODEPLUS\_PB6}}
{\footnotesize\ttfamily \label{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga1f9beaf68b00ae5598cb8d930da05704} 
\#define SYSCFG\+\_\+\+FASTMODEPLUS\+\_\+\+PB6~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga4f1109e7172c280e92a0a36a04f955a6}{SYSCFG\+\_\+\+PMCR\+\_\+\+I2\+C\+\_\+\+PB6\+\_\+\+FMP}}}



Fast-\/mode Plus driving capability on a specific GPIO. 

Enable Fast-\/mode Plus on PB6 \Hypertarget{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga4b939ef5ec69e81277ef2323d5917eb5}\index{Fast-\/mode Plus on GPIO@{Fast-\/mode Plus on GPIO}!SYSCFG\_FASTMODEPLUS\_PB7@{SYSCFG\_FASTMODEPLUS\_PB7}}
\index{SYSCFG\_FASTMODEPLUS\_PB7@{SYSCFG\_FASTMODEPLUS\_PB7}!Fast-\/mode Plus on GPIO@{Fast-\/mode Plus on GPIO}}
\doxysubsubsubsubsubsubsection{\texorpdfstring{SYSCFG\_FASTMODEPLUS\_PB7}{SYSCFG\_FASTMODEPLUS\_PB7}}
{\footnotesize\ttfamily \label{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga4b939ef5ec69e81277ef2323d5917eb5} 
\#define SYSCFG\+\_\+\+FASTMODEPLUS\+\_\+\+PB7~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga857e64c3b9046d7f4e31dcff948ee1fb}{SYSCFG\+\_\+\+PMCR\+\_\+\+I2\+C\+\_\+\+PB7\+\_\+\+FMP}}}

Enable Fast-\/mode Plus on PB7 \Hypertarget{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga2cd8442a02f25ed8e7e0ba6e5723edd4}\index{Fast-\/mode Plus on GPIO@{Fast-\/mode Plus on GPIO}!SYSCFG\_FASTMODEPLUS\_PB8@{SYSCFG\_FASTMODEPLUS\_PB8}}
\index{SYSCFG\_FASTMODEPLUS\_PB8@{SYSCFG\_FASTMODEPLUS\_PB8}!Fast-\/mode Plus on GPIO@{Fast-\/mode Plus on GPIO}}
\doxysubsubsubsubsubsubsection{\texorpdfstring{SYSCFG\_FASTMODEPLUS\_PB8}{SYSCFG\_FASTMODEPLUS\_PB8}}
{\footnotesize\ttfamily \label{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga2cd8442a02f25ed8e7e0ba6e5723edd4} 
\#define SYSCFG\+\_\+\+FASTMODEPLUS\+\_\+\+PB8~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga20cec3b2133abb30466383a87a73a07d}{SYSCFG\+\_\+\+PMCR\+\_\+\+I2\+C\+\_\+\+PB8\+\_\+\+FMP}}}

Enable Fast-\/mode Plus on PB8 \Hypertarget{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga71c50ae2406cd9b6dff73cd9cd189c3d}\index{Fast-\/mode Plus on GPIO@{Fast-\/mode Plus on GPIO}!SYSCFG\_FASTMODEPLUS\_PB9@{SYSCFG\_FASTMODEPLUS\_PB9}}
\index{SYSCFG\_FASTMODEPLUS\_PB9@{SYSCFG\_FASTMODEPLUS\_PB9}!Fast-\/mode Plus on GPIO@{Fast-\/mode Plus on GPIO}}
\doxysubsubsubsubsubsubsection{\texorpdfstring{SYSCFG\_FASTMODEPLUS\_PB9}{SYSCFG\_FASTMODEPLUS\_PB9}}
{\footnotesize\ttfamily \label{group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o_ga71c50ae2406cd9b6dff73cd9cd189c3d} 
\#define SYSCFG\+\_\+\+FASTMODEPLUS\+\_\+\+PB9~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga32e0273693846a65638ea444795d6860}{SYSCFG\+\_\+\+PMCR\+\_\+\+I2\+C\+\_\+\+PB9\+\_\+\+FMP}}}

Enable Fast-\/mode Plus on PB9 